like what was the tech that caused such a leap? They talk about how they switched up the x3D cache configuration - it used to be stacked above the main part of the chip with some sort of insulation in between, but they found a way to remove the insulation and put the 3D cache on the underside of the chip. I’m no expert and i watched the video yesterday, so sorry if that explanation isn’t clear. Effectively, they found a way to bring the 3D cache “closer” to the cores, which shortens the time it takes for the cores to communicate with the cache.